A vertical memory cell EPROM array (FIGS. 1, 1a and 1b) uses a vertical floating gate memory cell structure that can be fabricated with reduced cell area and channel length. The vertical memory cell memory array includes multiple rows of buried layers that are vertically stacked--a drain bitline (34) over a source groundline (32), defining a channel layer (36) in between. In each bitline row, trenches (22) of a selected configuration are formed, extending through the drain bitline and channel layer, and at least partially into the source groundline, thereby defining corresponding source (23), drain (24) and channel regions (25) adjacent each trench. The array can be made contactless (FIG. 1a), half-contact (FIG. 2a) or full contact (FIG. 2b), trading decreased access time for increased cell area. BeSang, a US based fabless start-up established by Korean American Engineers, produced vertical cell based semiconductor memory, which had been possible only in the lab, for the first time in the world. The vertical cell based memory technology is revolutionary since it could increase the production volume of memory by 5 times without the expansion of wafer.
BeSang and Korea’s National Nanofab Center(NNFC) announced on October 2 that the both parties had cooperated to manufacture vertical cell memory and they succeeded in producing vertical cell memory on 200 millimeter or 8 inch wafer in the 0.18 nanometer process. The pilot product will be open to the public within this month.
BeSang had already experienced the success in the production of vertical cell memory from its cooperation with Standford University in manufacturing vertical cell memory on 100 millimeter or 4 inch wafer in the 0.80 nanometer process. The success in the 0.18 nanometer process will make the application of the technology earlier than expected.
President Sang-yoon Lee of BeSang said, "The vertical cell memory technology will be an equivalent of operating four fabs, without additional investment. That`s why the industry is paying attention to this technology a lot. Particularly, it could cut the vicious circle of endless investment in the development for the next generation process, which has taken the most of the income. Therefore, this will help Korean chip makers to expand the gap with late-comers."
BeSang had revealed its pilot product manufactured in the 0.80 nanometer process to major chip makers in Korea and the US. These companies have been considering the application of the technology proposed by BeSang.